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triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 1 9.9 - 12.5 gb/s optical modulator driver TGA4954-SL key features and performance ? wide drive range (3v to 10v) ? single-ended input/output ? low power dissipation (1.1w @ 6vo) ? low rail ripple ? 25psec edge rates (20/80%) ? hot-pluggable ? package dimensions: 11.4 x 8.9 x 2.0 mm (0.450 x 0.350 x 0.080 inches) primary applications ? mach-zehnder mo dulator driver product description the triquint TGA4954-SL is part of a series of surface mount modulator drivers suitable for a variety of driver applicatio ns and is compatible with metro msa standards. the 4954 consists of two high performance wideband amplifiers combined with off chip circuitry assembled in a surface mo unt package. a single 4954 placed between t he mux and optical modulator provides oe ms with a board level modulator driver surf ace mount solution. the 4954 provides metro and long haul designers with system critical features such as: low power dissipation (1.2w at vo = 6v), low rail ripple, high voltage drive capability at 5v bias (6 v amplitude adjustable to 3 v), low output jitter, and low input drive sensitivity (250mv at vo = 6v). the 4954 requires external dc blocks, a low frequency choke, a nd control circuitry. evaluation boards av ailable upon request. lead free & rohs compliant. note: this device is early in the characterization process prio r to finalizing all electrical test specifications. specificatio ns are subject to change without notice. 0 4 8 12 16 20 24 28 32 36 0 5 10 15 20 frequency (ghz) s21 (db) -30 -25 -20 -15 -10 -5 0 5 10 15 s11,s22 (db) s21 s11 s22 measured data vdd=5v; id1=65ma; id2=115ma; vctrl1=-0.2v; vctrl2=+0.2v vout=6vpp
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 2 TGA4954-SL table i maximum ratings symbol parameter value notes v d1 v d2 drain voltage 8 v 1 / 2 / v g1 v g2 gate voltage range -3v to 0v 1 / v ctrl1 v ctrl2 control voltage range -3v to v d 1 / i d1 i d2 drain supply current (quiescent) 200 ma 350 ma 1 / 2 / | i g1 | | i g2 | gate supply current 15 ma 1 / | i ctrl1 | | i ctrl2 | control supply current 15 ma 1 / 5 / p in input continuous wave power 23 dbm 1 / 2 / v in 12.5gb/s prbs input voltage 4 v pp 1 / 2 / p d power dissipation 4 w 1 / 2 / 3 / t ch operating channel temperature 150 0 c 4 / t m mounting temperature (10 seconds) 230 0 c t stg storage temperature -65 to 150 0 c 1 / these ratings represent the maximum operable values for this device 2 / combinations of supply voltage, supply current, input power, and output power shall not exceed p d at a package base temperature of 80 c 3 / when operated at this bias condition with a baseplate temperature of 80 c, the mttf is reduced 4 / junction operating temperature will directly affect the device median time to failure (mttf). for maximum life, it is recommended that junction temperatures be maintained at the lowest possible levels. 5 / assure v ctrl1 never exceeds v d1 , and v ctrl2 never exceeds v d2 during bias up and down sequences.
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 3 table iii rf characterization table (t a = 25 c, nominal) parameter test conditions min typ max units notes small signal bandwidth 8 ghz saturated power bandwidth 12 ghz small signal gain 0.1, 2, 4 ghz 6 ghz 10 ghz 14 ghz 16 ghz 28 26 24 17 12 34 33 30 25 21 db 1 / input return loss 0.1, 2, 4, 6, 10, 14, 16 ghz 10 15 db 1 / output return loss 0.1, 2, 4, 6, 10, 14, 16 ghz 10 15 db 1 / noise figure 3 ghz 2.5 db small signal agc range midband 28 db saturated output power 2, 4, 6, 8 & 10 ghz 24 26.5 dbm 6 / 7 / TGA4954-SL table ii thermal information parameter test conditions t ch ( c) r jc ( c/w) mttf (hrs) r jc thermal resistance (channel to backside of package) v dd = 5v i dd = 215ma p diss = 1.08w t base = 70 c 92 20.4 >1e6 note: thermal transfer is conducted through the bottom of the TGA4954-SL package into the motherboard. the motherboard must be designed to assure adequate thermal transfer to the base plate.
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 4 TGA4954-SL table iii (continued) rf characterization table (t a = 25 c, nominal) parameter test conditions min typ max units notes eye amplitude v d2 = 8.0v v d2 = 6.5v v d2 = 5.5v v d2 = 4.5v v d2 = 4.0v 9.0 7.0 6.0 5.5 5.0 v pp 2 / additive jitter (rms) v in = 500mv pp v in = 800mv pp 1.2 1.4 3.0 3.0 psec 5 / q-factor v in = 250mv pp v in = 500mv pp v in = 800mv pp 25 25 25 39 42 42 v/v delta crossing percentage 250mv pp 800mv pp 10.0 8.0 % delta eye amplitude 250mv pp 800mv pp -0.50 -0.50 -0.1 0.0 0.50 0.50 v pp table iii notes: 1 / package rf bias: v dd = 5v, adjust v g1 to achieve i d1 = 65ma then adjust v g2 to achieve i d2 = 115ma, v ctrl1 = -0.2v & v ctrl2 = +0.2 v 2 /v in = 250mv, data rate = 10.7gb/s, v d1 = v d2 or greater, v ctrl2 and v g2 are adjusted for maximum output 5 / computed using rss method where j rms_dut = (j rms_total 2 -j rms_source 2 ) 6 / verified at die level on-wafer probe 7 / power bias die probe: v tee = 8v, adjust v g to achieve i d = 175ma 5%, v ctrl = +1.5v 8 / value is the difference with the 500mv input measurement. result is the absolute value. note: at the die level, drain bias is applied through the rf output port using a bias tee, voltage is at the dc input to the bias tee
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 5 -40 -35 -30 -25 -20 -15 -10 -5 0 0 2 4 6 8 10 12 14 16 18 20 frequency (ghz) s11,s22 (db) s11 s22 0 4 8 12 16 20 24 28 32 36 02468101214161820 frequency (ghz) s21 (db) measured data vdd=5v; id1=65ma; id2=115ma; vctrl1=-0.2v; vctrl2=+0.2v TGA4954-SL
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 6 measured data vdd=5v; id1=65ma; vctrl1=-0.2v; vin=500mvpp; vo=6vpp vg2 & vctrl2 are varied to achieve 6vo & 50% crossing 9.953gbps 10.7gbps 11.3gbps TGA4954-SL 12.5gbps
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 7 TGA4954-SL measured data vdd=5v; id1=65ma; vctrl1=-0.2v; vo=6vpp; 10.7gbps vg2 & vctrl2 are varied to achieve 6vo & 50% crossing vin=250mvpp vin=500mvpp vin=800mvpp
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 8 TGA4954-SL measured data vdd=5v; id1=65ma; vctrl1=- 0.2v; vin=500mvpp; 10.7gbps vg2 & vctrl2 are varied to achieve 6vo & 50% crossing 3vo 4vo 5vo 6vo input
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 9 TGA4954-SL tga4954 typical performance data measured in a test fixture test fixture block diagram vdd idd vg1 vctrl2 vg2 rf(in) rf(out) 4954 smt driver test fixture vctrl1 id1 id2
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 10 TGA4954-SL bias on 1. disable the output of mux 2. apply vg1, vg2, vctrl1 and vctrl2 in any sequence. 3. apply vdd. 4. make vg1 more positive until idd=65ma . - this is id1 (current into the first stage) - typical value for vg1 is -0.65v 5. make vg2 more positive until idd=180ma. - this sets id2 to 115ma. - typical value for vg2 is -0.55v 6. enable the output of the mux. - set vin=500mv 7. output swing adjust : adjust vctrl2 slightly positive to increase output swing or adjust vctrl2 slightly negative to decrease the output swing. - typical value for vctrl2 is +0.22v for vo=6v. 8. crossover adjust : adjust vg2 slightly positive to push the crossover down or adjust vg2 slightly negative to push the crossover up. - typical value for vg2 is -0.57v to center crossover with vo=6v. bias off 1. remove vdd. 2. remove vg1, vg2, vctrl1 and vctrl2 in any sequence. production - initial alignment - bias procedure vdd=5v, vo=6vamp, cpc=50% (hot-pluggable) bias network initial conditions - vg1=-1.5v vg2=-1.5v vctrl1=-0.2v vctrl2=+.1v vdd=5v
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 11 TGA4954-SL bias on 1. mux output can be either enabled or disabled 2. apply vg1, vg2, vctrl1 and vctrl2 in any sequence. 3. apply vdd. 4. enable the output of the mux 5. output swing adjust : adjust vctrl2 slightly positive to increase output swing or adjust vctrl2 slightly negative to decrease the output swing. 6. crossover adjust : adjust vg2 slightly positive to push the crossover down or adjust vg2 slightly negative to push the crossover up. bias off 1. remove vdd. 2. remove vg1, vg2, vctrl1 and vctrl2 in any sequence. production - post alignment - bias procedure vdd=5v, vo=6vamp, cpc=50% (hot-pluggable) bias network initial conditions - vg1= as found during initial alignment vg2=-as found during initial alignment vctrl1=-0.2v vctrl2=as found during initial alignment vdd=5v
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 12 mechanical drawing TGA4954-SL 0.080 ref. 0.020 sidewall lid 0.000 0.017 0.047 0.236 0.087 0.127 0.167 0.207 0.327 0.367 0.407 0.412 0.438 0.450 0.000 0.024 0.177 0.175 0.175 0.327 0.350 0.025 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.027 x 0.018 bond pad #1 bond pad #2 bond pad #3 bond pad #4 bond pad #5 bond pad #6 bond pad #7 bond pad #8 bond pad #9 n/c n/c vg1 n/c n/c vg2 n/c n/c rf out 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.018 x 0.041 0.020 x 0.018 0.335 x 0.206 bond pad #10 bond pad #11 bond pad #12 bond pad #13 bond pad #14 bond pad #15 bond pad #16 bond pad #17 bond pad #18 bond pad #19 n/c n/c vd2 n/c vctrl2 vd1 n/c vctrl1 rf in gnd 9 10 11 12 14 15 16 17 13 87654 32 1 19 18
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 13 application circuit TGA4954-SL notes: 1. c3 and c4 extend low frequency performance thru 30 khz. for applications requiring low frequency performance thru 100 khz, c3 and c4 may be omitted 2. c6 and c7 are power supply decoupling capacitors and may be omitted when driven directly with an op- amp. impedance looking into vctrl1 and vctrl2 is 10k ? real designator description manufacturer part number c1, c2 dc block, broadband presidio bb0502x7r104m16vnt9820 c3, c4, c5 10uf capacitor mlc ceramic avx 0802yc106kat c6, c7 0.01 ufcapacitor mlc ceramic avx 0603yc103kat c8 10 uf capacitor tantalum avx taja106k016r l1 220 uh inductor belfuse s581-4000-14 l2 330 nh inductor panasonic elj-far33mf2 r1, r2 274 ? resistor panasonic erj-2rkf2740x recommended components:
triquint semiconductor texas phone: ( 972)994-8465 fax: (972)994 8504 email: info-mmw@tqs.com web: www.triquint.com advance product information april 4, 2006 14 recommended surface mount package assembly proper esd precautions must be followed while handling packages. clean the board with acetone. rinse with alcohol. allow the circuit to fully dry. triquint recommends using a conductive solder paste for attachment. follow solder paste and reflow oven vendors? recommendations when developing a solder reflow profile. typical solder reflow profiles are listed in the table below. hand soldering is not recommended. solder paste can be applied using a stencil printer or dot placement. the volume of solder paste depends on pcb and component layout and should be well controlled to ensure consistent mechanical and electrical performance. this package has little tendency to self-align during reflow . clean the assembly with alcohol. gaas mmic devices are susceptible to damage from electrostatic discharge. pr oper precautions should be observed during handling, assembly and test. typical solder reflow profiles reflow profile snpb pb free ramp-up rate 3 c/sec 3 c/sec activation time and temperature 60 ? 120 sec @ 140 ? 160 c 60 ? 180 sec @ 150 ? 200 c time above melting point 60 ? 150 sec 60 ? 150 sec max peak temperature 240 c 260 c time within 5 c of peak temperature 10 ? 20 sec 10 ? 20 sec ramp-down rate 4 ? 6 c/sec 4 ? 6 c/sec ordering information part package style TGA4954-SL land grid array surface mount TGA4954-SL

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